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        </div><article class="page single"><h1 class="single-title animated flipInX">05-逻辑门电路和名词解释</h1><div class="post-meta">
            <div class="post-meta-line"><span class="post-author"><a href="https://adbean.gitee.io/" title="Author" target="_blank" rel="noopener noreffer author" class="author"><i class="fas fa-user-circle fa-fw"></i>Adbean</a></span>&nbsp;<span class="post-category">收录于 <a href="../../categories/%E4%BD%9C%E4%B8%9A/"><i class="far fa-folder fa-fw"></i>作业</a></span></div>
            <div class="post-meta-line"><i class="far fa-calendar-alt fa-fw"></i>&nbsp;<time datetime="2020-10-01">2020-10-01</time>&nbsp;<i class="fas fa-pencil-alt fa-fw"></i>&nbsp;约 978 字&nbsp;
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                <div class="details-content toc-content" id="toc-content-static"><nav id="TableOfContents">
  <ul>
    <li><a href="#digital-logic-gate-逻辑门电路">Digital logic gate 逻辑门电路</a>
      <ul>
        <li><a href="#and-gate-与门">AND gate 与门</a></li>
        <li><a href="#xor-gate-异或门">XOR gate 异或门</a></li>
        <li><a href="#circuit-diagram-电路图">Circuit diagram 电路图</a></li>
        <li><a href="#truth-table-真值表">Truth table 真值表</a></li>
        <li><a href="#circuit-equivalence">Circuit equivalence</a></li>
        <li><a href="#8bit-adder-8-位加法器">8bit Adder 8 位加法器</a></li>
        <li><a href="#logical-binary-operations-逻辑二元运算">Logical binary operations 逻辑二元运算</a></li>
        <li><a href="#explanation-of-terms-名词解释">Explanation of Terms 名词解释</a></li>
      </ul>
    </li>
  </ul>
</nav></div>
            </div><div class="content" id="content"><h2 id="digital-logic-gate-逻辑门电路">Digital logic gate 逻辑门电路</h2>
<h3 id="and-gate-与门">AND gate 与门</h3>
<table>
<thead>
<tr>
<th align="center">Symbol</th>
<th align="center">Expression</th>
<th align="center">Truth Table</th>
</tr>
</thead>
<tbody>
<tr>
<td align="center"><img
        class="lazyload"
        src="../../svg/loading.min.svg"
        data-src="../../AND_GATE.png"
        data-srcset="../../AND_GATE.png, ../../AND_GATE.png 1.5x, ../../AND_GATE.png 2x"
        data-sizes="auto"
        alt="/AND_GATE.png"
        title="AND gate" /></td>
<td align="center">$ Y = A B $</td>
<td align="center"><img
        class="lazyload"
        src="../../svg/loading.min.svg"
        data-src="../../AND_TABLE.png"
        data-srcset="../../AND_TABLE.png, ../../AND_TABLE.png 1.5x, ../../AND_TABLE.png 2x"
        data-sizes="auto"
        alt="/AND_TABLE.png"
        title="AND truth table" /></td>
</tr>
</tbody>
</table>
<p><strong>与门</strong>：仅当与门的输入<strong>均为高电平</strong>（1）时，输出才为<strong>高电平</strong>（1）时；若输入中至多有一个高电平时，则输出为低电平。也就是说，二输入与门的功能是得到两个二进制数的最小值。</p>
<h3 id="xor-gate-异或门">XOR gate 异或门</h3>
<table>
<thead>
<tr>
<th align="center">Symbol</th>
<th align="center">Expression</th>
<th align="center">Truth Table</th>
</tr>
</thead>
<tbody>
<tr>
<td align="center"><img
        class="lazyload"
        src="../../svg/loading.min.svg"
        data-src="../../XOR_GATE.png"
        data-srcset="../../XOR_GATE.png, ../../XOR_GATE.png 1.5x, ../../XOR_GATE.png 2x"
        data-sizes="auto"
        alt="/XOR_GATE.png"
        title="AND gate" /></td>
<td align="center">$ Y = A\oplus B =A\cdot \overline {B}+\overline {A}\cdot B $</td>
<td align="center"><img
        class="lazyload"
        src="../../svg/loading.min.svg"
        data-src="../../XOR_TABLE.png"
        data-srcset="../../XOR_TABLE.png, ../../XOR_TABLE.png 1.5x, ../../XOR_TABLE.png 2x"
        data-sizes="auto"
        alt="/XOR_TABLE.png"
        title="AND truth table" /></td>
</tr>
</tbody>
</table>
<p><strong>异或门</strong>：若异或门的两个输入的电平<strong>相异</strong>，则输出为<strong>高电平</strong>（1）；若两个输入的电平相同，则输出为低电平（0）。这一函数能实现模为 2 的加法，因此，异或门可以实现计算机中的二进制加法。半加器是由异或门和与门组成的。</p>
<h3 id="circuit-diagram-电路图">Circuit diagram 电路图</h3>
<p>Draw a circuit diagram corresponding to the following Boolean
expression: <strong>(A + B)(B + C)</strong></p>
<table>
<thead>
<tr>
<th align="center">Circuit Diagram</th>
<th align="center">Expression</th>
<th align="center">Truth Table</th>
</tr>
</thead>
<tbody>
<tr>
<td align="center"><img
        class="lazyload"
        src="../../svg/loading.min.svg"
        data-src="../../circuit_diagram.png"
        data-srcset="../../circuit_diagram.png, ../../circuit_diagram.png 1.5x, ../../circuit_diagram.png 2x"
        data-sizes="auto"
        alt="/circuit_diagram.png"
        title="circuit diagram" /></td>
<td align="center">$ Y = (A+B) (B+C) $</td>
<td align="center"><img
        class="lazyload"
        src="../../svg/loading.min.svg"
        data-src="../../circuit_table.png"
        data-srcset="../../circuit_table.png, ../../circuit_table.png 1.5x, ../../circuit_table.png 2x"
        data-sizes="auto"
        alt="/circuit_table.png"
        title="circuit table" /></td>
</tr>
</tbody>
</table>
<h3 id="truth-table-真值表">Truth table 真值表</h3>
<p>Show the behavior of the following circuit with a <strong>truth table</strong>:</p>
<table>
<thead>
<tr>
<th align="center">Circuit Diagram</th>
<th align="center">Expression</th>
<th align="center">Truth Table</th>
</tr>
</thead>
<tbody>
<tr>
<td align="center"><img
        class="lazyload"
        src="../../svg/loading.min.svg"
        data-src="../../behavior.png"
        data-srcset="../../behavior.png, ../../behavior.png 1.5x, ../../behavior.png 2x"
        data-sizes="auto"
        alt="/behavior.png"
        title="behavior" /></td>
<td align="center">$ Y = \overline{A} \oplus AB = \overline{A} + B $</td>
<td align="center"><img
        class="lazyload"
        src="../../svg/loading.min.svg"
        data-src="../../behavior_table.png"
        data-srcset="../../behavior_table.png, ../../behavior_table.png 1.5x, ../../behavior_table.png 2x"
        data-sizes="auto"
        alt="/behavior_table.png"
        title="behavior table" /></td>
</tr>
</tbody>
</table>
<h3 id="circuit-equivalence">Circuit equivalence</h3>
<p>Circuit equivalence means both circuits produce the exact <strong>same output</strong> for each input value combination</p>
<h4 id="use-truth-table-to-prove-the-following-formula">Use truth table to prove the following formula</h4>
<p>$$ \overline{AB} = \overline{A} + \overline{B} $$</p>
<table>
<thead>
<tr>
<th align="center">A</th>
<th align="center">B</th>
<th align="center">Y</th>
</tr>
</thead>
<tbody>
<tr>
<td align="center">0</td>
<td align="center">0</td>
<td align="center">1</td>
</tr>
<tr>
<td align="center">0</td>
<td align="center">1</td>
<td align="center">1</td>
</tr>
<tr>
<td align="center">1</td>
<td align="center">0</td>
<td align="center">1</td>
</tr>
<tr>
<td align="center">1</td>
<td align="center">1</td>
<td align="center">0</td>
</tr>
</tbody>
</table>
<p>两个表达式的真值表相同，实际上这是<strong>德摩根定律</strong> De Morgan&rsquo;s laws</p>
<h3 id="8bit-adder-8-位加法器">8bit Adder 8 位加法器</h3>
<p>There are eight 1bit full adder integrated circuits. Combine them to <strong>8bit adder</strong>
circuit using the following box diagram.</p>
<p><img
        class="lazyload"
        src="../../svg/loading.min.svg"
        data-src="../../1bitAdder.png"
        data-srcset="../../1bitAdder.png, ../../1bitAdder.png 1.5x, ../../1bitAdder.png 2x"
        data-sizes="auto"
        alt="/1bitAdder.png"
        title="1bitAdder" /></p>
<p><img
        class="lazyload"
        src="../../svg/loading.min.svg"
        data-src="../../8bitAdder.png"
        data-srcset="../../8bitAdder.png, ../../8bitAdder.png 1.5x, ../../8bitAdder.png 2x"
        data-sizes="auto"
        alt="/8bitAdder.png"
        title="8bitAdder" /></p>
<p>如图使用 Logisim 软件将 8 个 1bit 加法器级联，其中最低位 LSB 的 $ C_{in} $ 接地，每一级的 $ C_{out} $ 接入下一级的 $ C_{in} $，如图正在进行 $ A = 0111 1011, B = 0001 0011, A + B $ 的加法，其结果为 $ 1000 1110 $，进位为 0</p>
<h3 id="logical-binary-operations-逻辑二元运算">Logical binary operations 逻辑二元运算</h3>
<ol>
<li>
<p>$(X_8X_7X_6X_5X_4X_3X_2X_1)_2 \ or \  (00001111)_2 = ( )_2$</p>
<p>Solve: $ = (X_8X_7X_6X_5X_4 1111) $</p>
</li>
<li>
<p>$(X_8X_7X_6X_5X_4X_3X_2X_1)_2 \ xor \  (00001111)_2 = ( )_2$</p>
<p>Solve: 如果 $ (X_8X_7X_6X_5X_4X_3X_2X_1)_2 $ 每一位都与 $ (00001111)_2 $不同则为 1，否则为 0。</p>
</li>
<li>
<p>$(\ (X_8X_7X_6X_5X_4X_3X_2X_1)_2 \ and \  (11110000)_2 ) \ $</p>
<p>$or \ (not\ (X_8X_7X_6X_5X_4X_3X_2X_1)_2 \ and \ (00001111)_2) = ( ) _2  $</p>
<p>Solve:</p>
<p>左边 $ = (X_8X_7X_6X_5X_4 0000)_2$</p>
<p>右边 $ = not\ ((X_8X_7X_6X_5X_4X_3X_2X_1)_2 \ or\  (11110000)_2 ) = not \ (1111X_4X_3X_2X_1)_2 = (0000\overline{X_4} \  \overline{X_3} \ \overline{X_2} \  \overline{X_1})$</p>
<p>综上原式 $ = (X_8X_7X_6X_5 \  \overline{X_4} \  \overline{X_3} \ \overline{X_2} \  \overline{X_1})_2 $</p>
</li>
</ol>
<h3 id="explanation-of-terms-名词解释">Explanation of Terms 名词解释</h3>
<h4 id="logic-gate-逻辑门">Logic Gate 逻辑门</h4>
<p>A <strong>logic gate</strong> is an idealized or physical electronic device implementing a <strong>Boolean function</strong>, a logical operation performed on one or more binary inputs that produces a single binary output.</p>
<p><strong>逻辑门</strong>是实现<strong>布尔函数</strong>的理想化或物理电子设备，布尔函数是对一个或多个二进制输入执行的逻辑操作，可产生一个二进制输出。逻辑门是在<strong>集成电路</strong>上的基本组件。简单的逻辑门可由<strong>晶体管</strong>组成。</p>
<h4 id="boolean-algebra-逻辑代数">Boolean algebra 逻辑代数</h4>
<p>In mathematics and mathematical logic, <strong>Boolean algebra</strong> is the branch of algebra in which the values of the variables are <strong>the truth values</strong> true and false, usually denoted 1 and 0, respectively. Instead of elementary algebra, where the values of the variables are numbers and the prime operations are addition and multiplication, the main operations of Boolean algebra are the conjunction (and) denoted as ∧, the disjunction (or) denoted as ∨, and the negation (not) denoted as ¬.</p>
<p>在数理逻辑中，<strong>布尔代数</strong>是代数的分支，其中变量的值是<strong>真值</strong> true 和 false，通常分别表示为 1 和 0。 布尔代数的主要运算不是基本代数（变量的值是数字，素数运算是加法和乘法），而是代数（与）表示 ∧，析取（或）表示 ∨ 和负数，（非）表示为 ¬。</p>
<h4 id="flip-flop-触发器">Flip-flop 触发器</h4>
<ol>
<li>
<p>Flip-flop 的中文翻译是：</p>
<p>触发器</p>
</li>
<li>
<p>How many bits information does a SR latch store?</p>
<p>因为 S-R 锁存器有两个稳定状态，所以一个 S-R 锁存器可以储存一比特的信息。</p>
</li>
</ol>
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